Renesas H8S Series Hardware Manual page 34

16-bit single-chip microcomputer
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Figure 12.11 Example of Toggle Output Operation ................................................................... 338
Figure 12.12 Example of Input Capture Operation Setting Procedure ....................................... 339
Figure 12.13 Example of Input Capture Operation .................................................................... 340
Figure 12.14 Example of Synchronous Operation Setting Procedure ........................................ 341
Figure 12.15 Example of Synchronous Operation...................................................................... 342
Figure 12.16 Compare Match Buffer Operation......................................................................... 343
Figure 12.17 Input Capture Buffer Operation............................................................................. 343
Figure 12.18 Example of Buffer Operation Setting Procedure................................................... 344
Figure 12.19 Example of Buffer Operation (1) .......................................................................... 345
Figure 12.20 Example of Buffer Operation (2) .......................................................................... 346
Figure 12.21 Example of PWM Mode Setting Procedure .......................................................... 348
Figure 12.22 Example of PWM Mode Operation (1) ................................................................. 349
Figure 12.23 Example of PWM Mode Operation (2) ................................................................. 350
Figure 12.24 Example of PWM Mode Operation (3) ................................................................. 351
Figure 12.25 Example of Phase Counting Mode Setting Procedure........................................... 352
Figure 12.26 Example of Phase Counting Mode 1 Operation .................................................... 353
Figure 12.27 Example of Phase Counting Mode 2 Operation .................................................... 354
Figure 12.28 Example of Phase Counting Mode 3 Operation .................................................... 355
Figure 12.29 Example of Phase Counting Mode 4 Operation .................................................... 356
Figure 12.30 Count Timing in Internal Clock Operation............................................................ 360
Figure 12.31 Count Timing in External Clock Operation .......................................................... 360
Figure 12.32 Output Compare Output Timing ........................................................................... 361
Figure 12.33 Input Capture Input Signal Timing........................................................................ 361
Figure 12.34 Counter Clear Timing (Compare Match) .............................................................. 362
Figure 12.35 Counter Clear Timing (Input Capture) .................................................................. 362
Figure 12.36 Buffer Operation Timing (Compare Match) ......................................................... 363
Figure 12.37 Buffer Operation Timing (Input Capture) ............................................................. 363
Figure 12.38 TGI Interrupt Timing (Compare Match) ............................................................... 364
Figure 12.39 TGI Interrupt Timing (Input Capture) ................................................................... 365
Figure 12.40 TCIV Interrupt Setting Timing.............................................................................. 366
Figure 12.41 TCIU Interrupt Setting Timing.............................................................................. 366
Figure 12.42 Timing for Status Flag Clearing by CPU .............................................................. 367
Figure 12.43 Timing for Status Flag Clearing by DTC Activation ............................................ 367
Figure 12.45 Conflict between TCNT Write and Clear Operations ........................................... 369
Figure 12.47 Conflict between TGR Write and Compare Match ............................................... 370
Figure 12.49 Conflict between TGR Read and Input Capture.................................................... 372
Figure 12.50 Conflict between TGR Write and Input Capture................................................... 373
Rev. 3.00 Jul. 14, 2005 Page xxxiv of xlviii

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