Renesas H8S Series Hardware Manual page 965

Register
Abbreviation Reset
SMR_2 Initialized
BRR_2 Initialized
SCR_2 Initialized
TDR_2 Initialized
SSR_2 Initialized
RDR_2 Initialized
SCMR_2 Initialized
TCSR_0 Initialized
TCNT_0 Initialized
PAODR Initialized

PAPIN
PADDR Initialized
P1PCR Initialized
P2PCR Initialized
P3PCR Initialized
P1DDR Initialized
P2DDR Initialized
P1DR Initialized
P2DR Initialized
P3DDR Initialized
P4DDR Initialized
P3DR Initialized
P4DR Initialized
P5DDR Initialized
P6DDR Initialized
P5DR Initialized
P6DR Initialized
PBODR Initialized

PBPIN
P8DDR Initialized
High-
Speed/
Medium-
Speed Watch Sleep
  
  
  
 
Initialized
 
Initialized
 
Initialized
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
Sub- Sub- Module
Active Sleep Stop
  
  
  
Initialized Initialized Initialized Initialized
Initialized Initialized Initialized Initialized
Initialized Initialized Initialized Initialized
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
Rev. 3.00 Jul. 14, 2005 Page 917 of 986
Section 25 List of Registers
Software Hardware
Standby Standby Module

Initialized SCI_2

Initialized

Initialized
Initialized
Initialized
Initialized

Initialized

Initialized WDT_0

Initialized

Initialized PORT
 

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized
 

Initialized
REJ09B0098-0300