Renesas H8S Series Hardware Manual page 819
16-bit single-chip microcomputer
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Also See for H8S Series:
- Hardware manual (1047 pages) ,
- User manual (38 pages) ,
- User manual (31 pages)
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128-byte programming is performed in one programming processing. To program more than 128
bytes, update the programming destination address/program data parameter in 128-byte units and
repeat programming.
When less than 128 bytes of programming is performed, the program data must amount to 128
bytes by filling in invalid data. If the invalid data to be added is H'FF, the programming processing
time can be shortened.
(a)
Select the on-chip program to be downloaded and specify a download destination
When the PPVS bit in FPCS is set to 1, the programming program is selected.
Several programming/erasing programs cannot be selected at one time. If several programs are set,
download is not performed and a download error is returned to the SS bit in DPFR. The start
address of the download destination is specified by FTDAR.
(b) Write H'A5 in FKEY
If H'A5 is not written to FKEY for protection, 1 cannot be set to the SCO bit for a download
request.
(c)
Set the SCO bit in FCCS to 1 to execute download.
To set 1 to the SCO bit, the following conditions must be satisfied.
• H'A5 is written to FKEY.
• The SCO bit writing is executed in the on-chip RAM.
When the SCO bit is set to 1, download is started automatically. When execution returns to the
user procedure program, the SCO bit is already cleared to 0. Therefore, the SCO bit cannot be
confirmed to be 1 in the user procedure program.
The download result can be confirmed only by the return value of DPFR. To prevent incorrect
determination, before the SCO bit is set to 1, set the single byte of the on-chip RAM start address
(to be used as the DPFR parameter) specified by FTDAR to a value (e.g. H'FF) other than the
return value.
When download is executed, particular interrupt processing, which is accompanied by bank
switchover as described below, is performed as a microcomputer internal processing. Execute four
NOP instructions immediately after the instruction that sets the SCO bit to 1.
Section 21 Flash Memory (0.18-µm F-ZTAT Version)
Rev. 3.00 Jul. 14, 2005 Page 771 of 986
REJ09B0098-0300
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