Lmc Status Registers 1 And 2 (Lmcst1 And Lmcst2) - Renesas H8S Series Hardware Manual

Section 18 LPC Interface (LPC)

18.3.18 LMC Status Registers 1 and 2 (LMCST1 and LMCST2)

LMCST1 and LMCST2 indicate the processing status of the LMC. The contents of LMCST1 and
LMCST2 are output in response to the status read command. For details of the status read
command, see section 18.4.8, LPC/FW Memory Access Command.
• LMCST1
Bit Bit Name Initial Value Slave
7 FLPI 0
6 FLEI 0
Rev. 3.00 Jul. 14, 2005 Page 658 of 986
REJ09B0098-0300
R/W
Host Description
1
R/(W)* R Flash Memory Programming Interrupt/End Flag
Setting this bit by the flash memory programming
command generates an FLPI interrupt (LMCI).
0: Flash memory programming command wait
Flash memory programming end
[Clearing condition]
When writing 0 after reading FLPI = 1
1: Flash memory programming is in progress
[Setting condition]
When receiving by the flash memory
programming command (BUFTRAN = 1)
1
R/(W)* R Flash Memory Erasing Interrupt/End Flag
Setting this bit by the flash memory erasing
command generates an FLEI interrupt (LMCI).
0: Flash memory erasing command wait
Flash memory erasing end
[Clearing condition]
When writing 0 after reading FLEI = 1
1: Flash memory erasing is in progress
[Setting condition]
When receiving by the flash memory erasing
command (ERASEE = 1)