Setting Range Of Analog Power Supply And Other Pins; Notes On Board Design; Notes On Noise Countermeasures - Renesas H8S Series Hardware Manual

Section 19 A/D Converter
19.7.3

Setting Range of Analog Power Supply and Other Pins

If conditions shown below are not met, the reliability of this LSI may be adversely affected.
•
Analog input voltage range
The voltage applied to analog input pin ANn during A/D conversion should be in the range
AVss ≤ ANn ≤ AVref (n = 0 to 7).
• Relation between AVcc, AVss and Vcc, Vss
For the relationship between AVcc, AVss and Vcc, Vss, set AVss = Vss, but AVcc = Vcc is
not necessary and which one is greater does not matter. Even when the A/D converter is not
used, the AVcc and AVss pins must on no account be left open.
• AVref pin range
The reference voltage of the AVref pin should be in the range AVref ≤ AVcc.
19.7.4

Notes on Board Design

In board design, digital circuitry and analog circuitry should be as mutually isolated as possible,
and layout in which digital circuit signal lines and analog circuit signal lines cross or are in close
proximity should be avoided as far as possible. Failure to do so may result in incorrect operation
of the analog circuitry due to inductance, adversely affecting A/D conversion values. Also, digital
circuitry must be isolated from the analog input pins (AN0 to AN7), analog reference voltage
(AVref), and analog power supply voltage (AVcc) by the analog ground (AVss). Also, the analog
ground (AVss) should be connected at one point to a stable ground (Vss) on the board.
19.7.5

Notes on Noise Countermeasures

A protection circuit connected to prevent damage of the analog input pins (AN0 to AN7) and
analog reference voltage pin (AVref) due to an abnormal voltage such as an excessive surge
should be connected between AVcc and AVss, as shown in figure 19.7. Also, the bypass
capacitors connected to AVcc and AVref, and the filter capacitors connected to AN0 to AN7 must
be connected to AVss.
If a filter capacitor is connected, the input currents at the analog input pins (AN0 to AN7) are
averaged, and so an error may arise. Also, when A/D conversion is performed frequently, as in
scan mode, if the current charged and discharged by the capacitance of the sample-and-hold
circuit in the A/D converter exceeds the current input via the input impedance (R
arise in the analog input pin voltage. Careful consideration is therefore required when deciding the
circuit constants.
Rev. 3.00 Jul. 14, 2005 Page 730 of 986
REJ09B0098-0300
), an error will
in