Renesas H8S Series Hardware Manual page 27

21.2 Input/Output Pins ............................................................................................................... 744
21.3 Register Descriptions ......................................................................................................... 744
21.3.1 Programming/Erasing Interface Registers ............................................................ 746
21.3.2 Programming/Erasing Interface Parameters ......................................................... 753
21.4 On-Board Programming..................................................................................................... 764
21.4.1 Boot Mode ............................................................................................................ 764
21.4.2 User Program Mode.............................................................................................. 768
21.4.3 User Boot Mode.................................................................................................... 779
21.4.4 Storable Areas for Procedure Program and Program Data ................................... 783
21.5 Protection ........................................................................................................................... 791
21.5.1 Hardware Protection ............................................................................................. 791
21.5.2 Software Protection............................................................................................... 793
21.5.3 Error Protection..................................................................................................... 793
21.6 Switching between User MAT and User Boot MAT ......................................................... 795
21.7 Programmer Mode ............................................................................................................. 796
21.8 Serial Communication Interface Specifications for Boot Mode ........................................ 797
21.9 Usage Notes ....................................................................................................................... 824
Section 22 Boundary Scan (JTAG) ...................................................................827
22.1 Features.............................................................................................................................. 827
22.2 Input/Output Pins ............................................................................................................... 829
22.3 Register Descriptions ......................................................................................................... 830
22.3.1 Instruction Register (SDIR) .................................................................................. 830
22.3.2 Bypass Register (SDBPR) .................................................................................... 832
22.3.3 Boundary Scan Register (SDBSR) ....................................................................... 832
22.3.4 ID Code Register (SDIDR)................................................................................... 842
22.4 Operation ........................................................................................................................... 842
22.4.1 TAP Controller State Transitions.......................................................................... 842
22.4.2 JTAG Reset........................................................................................................... 843
22.5 Boundary Scan ................................................................................................................... 844
22.5.1 Supported Instructions .......................................................................................... 844
22.5.2 Notes ..................................................................................................................... 846
22.6 Usage Notes ....................................................................................................................... 846
Section 23 Clock Pulse Generator .....................................................................849
23.1 Oscillator............................................................................................................................ 850
23.1.1 Connecting Crystal Resonator .............................................................................. 850
23.1.2 External Clock Input Method................................................................................ 851
23.2 Duty Correction Circuit ..................................................................................................... 854
23.3 Medium-Speed Clock Divider ........................................................................................... 854
Rev. 3.00 Jul. 14, 2005 Page xxvii of xlviii