Renesas H8S Series Hardware Manual page 662

Section 18 LPC Interface (LPC)
• Supports LPC/FW memory cycles
 Supports LPC memory read, LPC memory write, FW memory read, and FW memory write
cycle transfer
 FW memory read and FW memory write cycles can be transferred in
bytes/words/longwords
 LPC and FW memory cycles support the flash memory programming, flash memory
erasing, and user commands
• Supports docking LPC
 LAD3 toLAD0, LFRAME, LRESET, SERIRQ, CLKRUN, and LDRQ can be connected to
DLAD3 to DLAD0, DLFRAME, DLRESET, DSERIRQ, DCLKRUN, and DLDRQ,
respectively.
 Resistance is 40 Ω (typ.).
Rev. 3.00 Jul. 14, 2005 Page 614 of 986
REJ09B0098-0300