Renesas H8S Series Hardware Manual page 620

2
Section 16 I C Bus Interface (IIC)
2
Table 16.11 I C Bus Timing (with Maximum Influence of t
Item t Indication
cyc
t 0.5 t (–t )
SCLHO SCLO Sr
t 0.5 t (–t )
SCLLO SCLO Sf
t 0.5 t –1 t
BUFO SCLO cyc
(–t )
Sr
t 0.5 t –1 t
STAHO SCLO cyc
(–t )
Sf
t 1 t (–t )
STASO SCLO Sr
t 0.5 t + 2 t
STOSO SCLO cyc
(–t )
Sr
3
t 1 t –3 t
*
SDASO SCLLO cyc
(–t )
(master)
Sr
3
t 1 t *
SDASO SCLL
(slave)
2
–12 t *
cyc
(–t )
Sr
t 3 t
SDAHO cyc
Notes: 1. Does not meet the I
is necessary: (a) secure a start/stop condition issuance interval; (b) adjust the rise and
fall times by means of a pull-up resistor and capacitive load; (c) reduce the transfer rate;
(d) select slave devices whose input timing permits this output timing.
The values in the above table will vary depending on the settings of the IICX bit and bits
CKS0 to CKS2. Depending on the frequency it may not be possible to achieve the
maximum transfer rate; therefore, whether or not the I
met must be determined in accordance with the actual setting conditions.
2. Value when the IICX bit is set to 1. When the IICX bit is cleared to 0, the value is (t
6 t ).
cyc
3. Calculated using the I
high-speed mode: 1300 ns min.).
Rev. 3.00 Jul. 14, 2005 Page 572 of 986
REJ09B0098-0300
t /t
Sr Sf
Influence
(Max.)
Standard mode –1000
High-speed mode –300
Standard mode –250
High-speed mode –250
Standard mode –1000
High-speed mode –300
Standard mode –250
High-speed mode –250
Standard mode –1000
High-speed mode –300
Standard mode –1000
High-speed mode –300
Standard mode –1000
High-speed mode –300
Standard mode –1000
High-speed mode –300
Standard mode 0
High-speed mode 0
2
C bus interface specification. Remedial action such as the following
2
C bus specification values (standard mode: 4700 ns min.;
/t )
Sr Sf
Time Indication (at Maximum Transfer Rate) [ns]
2
I C Bus
Specifi-
φ = φ =
cation
5 MHz
(Min.) 8 MHz
4000 4000 4000
600 950 950
4700 4750 4750
1
1300 1000* 1000*
1
4700 3800* 3875*
1
1300 750* 825*
4000 4550 4625
600 800 875
4700 9000 9000
600 2200 2200
4000 4400 4250
600 1350 1200
250 3100 3325
100 400 625
250 1300 2200
1
100 –1400* –500*
0 600 375
0 600 375
2
C bus interface specifications are
φ = φ =
16 MHz
10 MHz
4000 4000
950 950
4750 4750
1 1 1
1000* 1000*
1 1 1
3900* 3939*
1 1 1
850* 888*
4650 4688
900 938
9000 9000
2200 2200
4200 4125
1150 1075
3400 3513
700 813
2500 2950
1 1
–200* 250
300 188
300 188
φ =
20 MHz
4000
950
4750
1
1000*
1
3950*
1
900*
4700
900
9000
2200
4100
1050
3550
850
3100
400
150
150
–
SCLL