Slave Address Register 1 (Sar1) - Renesas H8S Series Hardware Manual

Section 18 LPC Interface (LPC)

18.3.25 Slave Address Register 1 (SAR1)

SAR1 selects the slave start address of the flash memory obtained by translating the host address
in HBAR1. The bits 23 to 16 are selected by this register. The lower 16 bits are fixed H'0000. The
contents of this register must not be changed in LPC/FW memory cycles (while LMCE is set to 1).
Initial
Bit Bit Name Value
7 SA1R23 0
6 SA1R22 0
5 SA1R21 0
4 SA1R20 0
3 SA1R19 0
2 SA1R18 0
1 SA1R17 0
0 SA1R16 0
Rev. 3.00 Jul. 14, 2005 Page 670 of 986
REJ09B0098-0300
R/W
Slave Host Description

R/W Slave Address Bits 23 to 16

R/W Select bits 23 to 16 of the flash memory address obtained
by translating the host address. The value H'10 to H'FF

R/W
should not be selected.
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R/W
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R/W
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R/W
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R/W
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R/W