Status Registers 1 To 4 (Str1 To Str4) - Renesas H8S Series Hardware Manual

Section 18 LPC Interface (LPC)
18.3.9

Status Registers 1 to 4 (STR1 to STR4)

STR1 to STR4 are 8-bit registers that indicate status information during LPC interface processing.
The registers selected from the host according to the I/O address are shown in the following table.
For information on STR3 and STR4 selection, see the section of the corresponding LADR. In an
LPC I/O read cycle, the data in the selected register is transferred to the host.
Bits 15 to 4 Bit 3
Bits 15 to 4 Bit 3
n = 1 to 4
Note: In bits 15 to 0, channel 1 and channel 2 corresponds to H'0064 and H'0066, respectively.
• STR1
Bit Bit Name Initial Value Slave Host Description
7 DBU17 0
6 DBU16 0
5 DBU15 0
4 DBU14 0
3 C/D1 0
2 DBU12 0
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I/O Address
Bit 2 Bit 1
1 Bit1
R/W
R/W R
R/W R
R/W R
R/W R
R R
R/W R
Transfer
Cycle
Bit 0
Bit 0 I/O read
Defined by User
The user can use these bits as necessary.
Command/Data
When the host writes to IDR1, bit 2 of the I/O address
is written into this bit to indicate whether IDR1
contains data or a command.
0: Content of input data register (IDR1) is a data
1: Content of input data register (IDR1) is a
command
Defined by User
The user can use this bit as necessary.
Host Register Selection
STRn read