18.4.15 On-Chip Ram Protection; 18.4.16 Flash Memory Programming; Figure 18.14 Protected Address Space In On-Chip Ram - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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18.4.15 On-Chip RAM Protection

The on-chip RAM protection to the host access can be enabled or disabled by the setting of the

RAMWE or RAMRE bits. The on-chip RAM is protected by the initial value. When accessing to

the on-chip RAM, the protection must be disabled.

Figure 18.14 shows the protected address space in the on-chip RAM.

Figure 18.15 shows an example of flowchart for programming the flash memory in the LPC/FW

memory write cycle.

Section 18 LPC Interface (LPC)

Rev. 3.00 Jul. 14, 2005 Page 707 of 986

REJ09B0098-0300

H8s/2100 series H8s/2114r R4f2114r