Renesas H8S Series Hardware Manual page 960

Section 25 List of Registers
Register
Abbreviation Reset
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IDR2
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ODR2
STR2 Initialized
HISEL Initialized
HICR0 Initialized
HICR1 Initialized
HICR2 Initialized
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HICR3
WUEMRB Initialized
WUEMR Initialized
PGODR Initialized
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PGPIN
PGDDR Initialized
PEPCR Initialized
PFODR Initialized
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PEPIN
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PFPIN
PCODR Initialized
PDODR Initialized
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PCPIN
PFDDR Initialized
PCDDR Initialized
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PDPIN
PDDDR Initialized
TCR_0 Initialized
TMDR_0 Initialized
TIORH_0 Initialized
TIORL_0 Initialized
TIER_0 Initialized
TSR_0 Initialized
Rev. 3.00 Jul. 14, 2005 Page 912 of 986
REJ09B0098-0300
High-
Speed/
Medium-
Speed Watch Sleep
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Sub- Sub- Module
Active Sleep Stop
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Software Hardware
Standby Standby Module
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LPC
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Initialized
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Initialized
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Initialized
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Initialized
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Initialized
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Initialized INT
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Initialized
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Initialized PORT
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Initialized
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Initialized
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Initialized
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Initialized
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Initialized
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PORT
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Initialized
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Initialized
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Initialized
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Initialized TPU_0
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Initialized
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Initialized
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Initialized
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Initialized
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Initialized