Renesas H8S Series Hardware Manual page 810

Section 21 Flash Memory (0.18-µm F-ZTAT Version)
(b) Flash pass/fail result parameter (FPFR: general register R0L of CPU)
This parameter indicates the return value of the erasing processing result.
Initial
Bit Bit Name Value
 
7

6 MD

5 EE

4 FK
Rev. 3.00 Jul. 14, 2005 Page 762 of 986
REJ09B0098-0300
R/W Description

Unused
The return value is 0.
R/W Erasing Mode Related Setting Error Detect
Returns the check result whether a high level signal is
input to the FWE pin or whether the error-protection
state is not entered. When a low-level signal is input to
the FWE pin or the error-protection state is entered, 1 is
written to this bit. These states can be confirmed with the
FWE and FLER bits in FCCS. For conditions to enter the
error-protection state, see section 21.5.3, Error
Protection.
0: FWE and FLER settings are normal (FWE = 1,
FLER = 0)
1: Erasing cannot be performed because FWE = 0 or
FLER = 1
R/W Erasure Execution Error Detect
1 is returned to this bit when the user MAT could not be
erased or when flash-memory related register settings
are partially changed. If this bit is set to 1, there is a high
possibility that the user MAT is partially erased. In this
case, after removing the error factor, erase the user
MAT. If FMATS is set to H'AA and the user boot MAT is
selected, an error occurs when erasure is performed. In
this case, both the user MAT and user boot MAT are not
erased. Erasing of the user boot MAT should be
performed in boot mode or programmer mode.
0: Erasure has ended normally
1: Erasure has ended abnormally and erasure result is
not guaranteed
R/W Flash Key Register Error Detect
Returns the check result of the FKEY value before the
start of the erasing processing.
0: FKEY setting is normal (FKEY = H'5A)
1: FKEY setting is abnormal (FKEY = value other than
H'5A)