Register Descriptions - Renesas H8S Series Hardware Manual

7.2

Register Descriptions

The DTC has the following registers.
•
DTC mode register A (MRA)
•
DTC mode register B (MRB)
•
DTC source address register (SAR)
•
DTC destination address register (DAR)
•
DTC transfer count register A (CRA)
•
DTC transfer count register B (CRB)
These six registers cannot be directly accessed from the CPU. When a DTC activation interrupt
source occurs, the DTC reads a set of register information that is stored in on-chip RAM to the
corresponding DTC registers and transfers data. After the data transfer, it writes a set of updated
register information back to on-chip RAM.
•
DTC enable register (DTCER)
•
DTC vector register (DTVECR)
Section 7 Data Transfer Controller (DTC)
Rev. 3.00 Jul. 14, 2005 Page 137 of 986
REJ09B0098-0300