Figure 21.20 Bit-Rate-Adjustment Sequence - Renesas H8S Series Hardware Manual

(2) Bit-Rate-Adjustment State
The bit rate is adjusted by measuring the period of a low-level byte (H'00) transmitted from the
host. The bit rate can be changed by the command for a new bit rate selection. After the bit rate
has been adjusted, the boot program enters the inquiry/selection state. The bit-rate-adjustment
sequence is shown in figure 21.20.
Host
(3) Communications Protocol
After adjustment of the bit rate, the protocol for communications between the host and the boot
program is as shown below.
1. 1-byte commands and 1-byte responses
These commands and responses are comprised of a single byte. They are the inquiries and the
ACK for successful completion.
2. n-byte commands or n-byte responses
These commands and responses are comprised of n bytes of data. They are selection
commands and responses to inquiries.
The size of program data is not included under this heading because it is determined in another
command.
3. Error response
This response is an error response to the commands. It is two bytes of data, and consists of an
error response and an error code.
H'00 (30 times maximum)
H'00 (Completion of adjustment)
H'55
H'E6 (Boot response)
(H'FF (error))

Figure 21.20 Bit-Rate-Adjustment Sequence

Section 21 Flash Memory (0.18-µm F-ZTAT Version)
Boot Program
Measuring the
Rev. 3.00 Jul. 14, 2005 Page 799 of 986
1-bit length
REJ09B0098-0300