Interrupt Control Registers A To D (Icra To Icrd) - Renesas H8S/2100 Series Hardware Manual

Register Name
Wake-up event interrupt mask
register B
Wake-up sense control register A
(WUE15 to WUE8)
Wake-up sense control register B
(WUE7 to WUE0)
Wake-up input interrupt status
register A (WUE15 to WUE8)
Wake-up input interrupt status
register B (WUE7 to WUE0)
Wake-up enable register
1. Address in the upper cell: when RELOCATE = 0, address in the lower cell: when
Note:
RELOCATE = 1
2. Address in the upper cell: when EIVS = 0, address in the lower cell: when EIVS = 1
6.3.1

Interrupt Control Registers A to D (ICRA to ICRD)

The ICR registers set interrupt control levels for interrupts other than NMI. The correspondence
between interrupt sources and ICRA to ICRD settings is shown in tables 6.3.
Bit Bit Name
7 to 0 ICRn7 to ICRn0
Note: n: A to D
Abbreviation
WUEMRB
WUESCRA
WUESCRB
WUESRA
WUESRB
WUEER
Initial Value R/W Description
All 0 R/W Interrupt Control Level
R/W Initial Value Address
R/W H'FF
R/W H'00
R/W H'00
R/W H'00
R/W H'00
R/W H'00
0: Corresponding interrupt source is interrupt
control level 0 (no priority)
1: Corresponding interrupt source is interrupt
control level 1 (priority)
Rev. 1.00 May 09, 2008 Page 101 of 954
Section 6 Interrupt Controller
Data Bus
Width
H'FE44 8
H'FE84 8
H'FE96 8
H'FE85 8
H'FE97 8
H'FE86 8
REJ09B0462-0100