Renesas H8S Series Hardware Manual page 23
16-bit single-chip microcomputer
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Also See for H8S Series:
- Hardware manual (1047 pages) ,
- User manual (38 pages) ,
- User manual (21 pages)
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15.10.3 Mark State and Break Sending.............................................................................. 498
(Clocked Synchronous Mode Only) ..................................................................... 498
15.10.5 Relation between Writing to TDR and TDRE Flag .............................................. 498
15.10.6 Restrictions on Using DTC................................................................................... 499
15.10.7 SCI Operations during Mode Transitions ............................................................. 499
15.10.8 Notes on Switching from SCK Pins to Port Pins .................................................. 503
2
16.1 Features.............................................................................................................................. 505
16.2 Input/Output Pins ............................................................................................................... 509
16.3 Register Descriptions ......................................................................................................... 510
2
16.3.1 I
C Bus Data Register (ICDR) .............................................................................. 510
16.3.2 Slave Address Register (SAR).............................................................................. 511
16.3.3 Second Slave Address Register (SARX) .............................................................. 512
2
16.3.4 I
C Bus Mode Register (ICMR)............................................................................ 514
2
16.3.5 I
C Bus Control Register (ICCR).......................................................................... 517
2
16.3.6 I
C Bus Status Register (ICSR)............................................................................. 526
16.3.7 DDC Switch Register (DDCSWR) ....................................................................... 530
2
16.3.8 I
C Bus Extended Control Register (ICXR).......................................................... 531
16.4 Operation ........................................................................................................................... 535
2
16.4.1 I
C Bus Data Format ............................................................................................. 535
16.4.2 Initialization .......................................................................................................... 537
16.4.3 Master Transmit Operation ................................................................................... 537
16.4.4 Master Receive Operation..................................................................................... 541
16.4.5 Slave Receive Operation....................................................................................... 551
16.4.6 Slave Transmit Operation ..................................................................................... 559
16.4.7 IRIC Setting Timing and SCL Control ................................................................. 562
16.4.8 Operation by Using DTC ...................................................................................... 565
16.4.9 Noise Canceller..................................................................................................... 567
16.4.10 Initialization of Internal State ............................................................................... 568
16.5 Interrupt Sources................................................................................................................ 569
16.6 Usage Notes ....................................................................................................................... 570
16.6.1 Module Stop Mode Setting ................................................................................... 580
Section 17 Keyboard Buffer Control Unit (KBU).............................................581
17.1 Features.............................................................................................................................. 581
17.2 Input/Output Pins ............................................................................................................... 584
17.3 Register Descriptions ......................................................................................................... 585
17.3.1 Keyboard Control Register 1 (KBCR1)................................................................ 585
Rev. 3.00 Jul. 14, 2005 Page xxiii of xlviii
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