Figure 12.40 Tciv Interrupt Setting Timing; Figure 12.41 Tciu Interrupt Setting Timing - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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Section 12 16-Bit Timer Pulse Unit (TPU)
(3)
TCFV Flag/TCFU Flag Setting Timing
Figure 12.40 shows the timing for setting of the TCFV flag in TSR by overflow occurrence, and
TCIV interrupt request signal timing. Figure 12.41 shows the timing for setting of the TCFU flag
in TSR by underflow occurrence, and TCIU interrupt request signal timing.
φ
TCNT input
clock
TCNT
(overflow)
Overflow
signal
TCFV flag
TCIV interrupt
φ
TCNT
input clock
TCNT
(underflow)
Underflow
signal
TCFU flag
TCIU interrupt
Rev. 3.00 Jul. 14, 2005 Page 366 of 986
REJ09B0098-0300
H'FFFF

Figure 12.40 TCIV Interrupt Setting Timing

H'0000

Figure 12.41 TCIU Interrupt Setting Timing

H'0000
H'FFFF

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