Input/Output Pins; Register Descriptions; Timer Counter (Tcnt); Table 14.1 Pin Configuration - Renesas H8S Series Hardware Manual

14.2

Input/Output Pins

The WDT has the pins listed in table 14.1.

Table 14.1 Pin Configuration

Name
Reset output pin
External sub-clock input
pin
14.3

Register Descriptions

The WDT has the following registers. To prevent accidental overwriting, TCSR and TCNT have
to be written to in a method different from normal registers. For details, see section 14.6.1, Notes
on Register Access. For details on the system control register, see section 3.2.2, System Control
Register (SYSCR).

• Timer counter (TCNT)

• Timer control/status register (TCSR)
14.3.1 Timer Counter (TCNT)
TCNT is an 8-bit readable/writable up-counter.
TCNT is initialized to H'00 when the TME bit in timer control/status register (TCSR) is cleared to
0.
Symbol I/O
RESO
Output
EXCL Input
Section 14 Watchdog Timer (WDT)
Function
Outputs the counter overflow signal in
watchdog timer mode
Inputs the clock pulses to the WDT_1
prescaler counter
Rev. 3.00 Jul. 14, 2005 Page 415 of 986
REJ09B0098-0300