Figure 24.1 Mode Transition Diagram - Renesas H8S Series Hardware Manual

Reset state
Program execution state
High-speed
mode
(main clock)
SCK2 to
SCK0 are
0
Medium-speed
mode
(main clock)
SLEEP instruction
SSBY = 1, PSS = 1,
DTON = 1, LSON = 0
After the oscillation
stabilization time
(STS2 to STS0), clock
switching exception
processing
Subactive mode
(subclock)
Notes: • When a transition is made between modes by means of an interrupt, the transition cannot be made
on interrupt source generation alone. Ensure that interrupt handling is performed after accepting the
interrupt request.
• Always select high-speed mode before making a transition to watch mode or subactive mode.
1. NMI, IRQ0 to IRQ15, KIN0 to KIN15, WUE0 to WUE15, WDT_1, and KBU interrupts
2. NMI, IRQ0 to IRQ15, KIN0 to KIN15, WUE0 to WUE15, WDT_0, WDT_1, TMR_0, TMR_1,
and KBU interrupts
3.
NMI, IRQ0 to IRQ15, KIN0 to KIN15, WUE0 to WUE15, and KBU interrupts
STBY pin = High
RES pin = Low
RES pin = High
SCK2 to
SCK0 are
not 0
External interrupt*
Interrupt*
LSON bit = 0
SLEEP instruction
SSBY = 1, PSS = 1,
DTON = 1, LSON = 1
Clock switching
exception processing
: Transition after exception processing

Figure 24.1 Mode Transition Diagram

SLEEP instruction
Any interrupt
SLEEP instruction
3
SLEEP
instruction
1
SLEEP
instruction
Interrupt* 1
LSON bit = 1
SLEEP instruction
Interrupt* 2
Rev. 3.00 Jul. 14, 2005 Page 867 of 986
Section 24 Power-Down Modes
Program halt state
STBY pin = Low
Hardware
standby mode
SSBY = 0, LSON = 0
Sleep mode
(main clock)
SSBY = 1,
PSS = 0, LSON = 0
Software
standby mode
SSBY = 1,
PSS = 1, DTON = 0
Watch mode
(subclock)
SSBY = 0,
PSS = 1, LSON = 1
Subsleep mode
(subclock)
: Power-down mode
REJ09B0098-0300