For operating modes after the reset state is cancelled, this LSI has not only the normal program
execution state but also seven power-down modes in which power consumption is significantly
reduced. In addition, there is also module stop mode in which reduced power consumption can be
achieved by individually stopping on-chip peripheral modules.
• Medium-speed mode
System clock frequency for the CPU operation can be selected as φ/2, φ/4, φ/8, φ/16,or φ/32.
• Subactive mode
The CPU operates based on the subclock, and on-chip peripheral modules TMR_0, TMR_1,
WDT_0, and WDT_1 continue operating.
• Sleep mode
The CPU stops but on-chip peripheral modules continue operating.
• Subsleep mode
The CPU stops but on-chip peripheral modules TMR_0, TMR_1, WDT_0, and WDT_1
continue operating.
• Watch mode
The CPU stops but on-chip peripheral module WDT_1 continue operating.
• Software standby mode
The clock pulse generator stops, and the CPU and on-chip peripheral modules stop operating.
• Hardware standby mode
The clock pulse generator stops, and the CPU and on-chip peripheral modules enter the reset
state.
• Module stop mode
Independently of above operating modes, on-chip peripheral modules that are not used can be
stopped individually.
Section 24 Power-Down Modes
Section 24 Power-Down Modes
Rev. 3.00 Jul. 14, 2005 Page 859 of 986
REJ09B0098-0300