Renesas H8S Series Hardware Manual page 242

Section 8 I/O Ports
• P84/IRQ3/TxD1/IrTxD
The pin function is switched as shown below according to the combination of the TE bit in
SCR of SCI_1 and the P84DDR bit. When the ISS3 bit in ISSR is cleared to 0 and the IRQ3E
bit in IER of the interrupt controller is set to 1, this pin can be used as the IRQ3 input pin.
TE
P84DDR
Pin function
• P83/LPCPD
The pin function is switched as shown below according to the combination of the LPC4E bit
in HICR4 of LPC, LPC3E to LPC1E bits in HICR0, LMCE bit in LMCCR1, and the P83DDR
bit. LPCENABLE in the following table is expressed by the following logical expressions.
LPCENABLE : LPC4E + LPC3E + LPC2E + LPC1E + LMCE
LPCENABLE
P83DDR
Pin function
• P82/CLKRUN
The pin function is switched as shown below according to the combination of the LPC4E bit
in HICR4 of LPC, LPC3E to LPC1E bits in HICR0, LMCE bit in LMCCR1, and the P82DDR
bit. LPCENABLE in the following table is expressed by the following logical expressions.
LPCENABLE : LPC4E + LPC3E + LPC2E + LPC1E + LMCE
LPCENABLE
P82DDR
Pin function
Rev. 3.00 Jul. 14, 2005 Page 194 of 986
REJ09B0098-0300
0
0
P84 input pin P84 output pin
0
P83 input pin
0
P82 input pin
1
TxD1 output pin/IrTxD output pin
IRQ3 input pin
0
1
P83 output pin
0
1
P82 output pin
1

1

LPCPD input pin
1

CLKRUN input/output pin