Jtag Reset; Figure 22.2 Tap Controller State Transitions - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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Test-logic-reset
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Run-test/idle
22.4.2

JTAG Reset

The JTAG can be reset in two ways.
• The JTAG is reset when the ETRST pin is held at 0.
• When ETRST = 1, the JTAG can be reset by inputting at least five ETCK clock cycles while
ETMS = 1.
0
1
Select-DR-scan
1
Capture-DR
0
Update-DR

Figure 22.2 TAP Controller State Transitions

1
0
0
0
Shift-DR
1
1
Exit1-DR
0
0
Pause-DR
1
Exit2-DR
1
1
0
Rev. 3.00 Jul. 14, 2005 Page 843 of 986
Section 22 Boundary Scan (JTAG)
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Select-IR-scan
0
1
Capture-IR
0
0
Shift-IR
1
1
Exit1-IR
0
0
Pause-IR
1
0
Exit2-IR
1
Update-IR
1
0
REJ09B0098-0300

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