Location Of Register Information And Dtc Vector Table; Figure 7.3 Dtc Register Information Location In Address Space - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Section 7 Data Transfer Controller (DTC)

Location of Register Information and DTC Vector Table

Locate the register information in the on-chip RAM (addresses: H'(FF)EC00 to H'(FF)EFFF).

The method for locating the register information in address space is shown in figure 7.3. Locate

MRA, SAR, MRB, DAR, CRA, and CRB, in that order, from the start address of the register

information. In the case of chain transfer, register information should be located in consecutive

areas as shown in figure 7.3, and the register information start address should be located at the

vector address corresponding to the interrupt source in the DTC vector table. The DTC reads the

start address of the register information from the vector table set for each activation source, and

then reads the register information from that start address.

When the DTC is activated by software, the vector address is obtained from: H'0400 +

(DTVECR[6:0] × 2). For example, if DTVECR is H'10, the vector address is H'0420.

The configuration of the vector address is a 2-byte unit. Specify the lower two bytes of the register

information start address.

start address

Rev. 3.00 Jul. 14, 2005 Page 144 of 986

REJ09B0098-0300

Lower address

for 2nd transfer in

chain transfer

H8s/2100 series H8s/2114r R4f2114r