Renesas H8S Series Hardware Manual page 670

16-bit single-chip microcomputer
Hide thumbs Also See for H8S Series:
Table of Contents

Advertisement

Section 18 LPC Interface (LPC)
• HICR1
Bit
Bit Name Initial Value Slave Host Description
7
LPCBSY
0
Rev. 3.00 Jul. 14, 2005 Page 622 of 986
REJ09B0098-0300
R/W
R
LPC Busy
Indicates that the LPC interface is processing a
transfer cycle.
0: LPC interface is in transfer cycle wait state
Bus idle, or transfer cycle not subject to
processing is in progress
Cycle type or address indeterminate during
transfer cycle
[Clearing conditions]
LPC hardware reset or LPC software reset
LPC hardware shutdown or LPC software
shutdown
Forced termination (abort) of transfer cycle
subject to processing
Normal termination of transfer cycle subject to
processing
1: LPC interface is performing transfer cycle
processing
[Setting condition]
Match of cycle type and address

Advertisement

Table of Contents
loading

This manual is also suitable for:

H8s/2100 seriesH8s/2114rR4f2114r

Table of Contents