Table 18.13 Hirq Setting And Clearing Conditions - Renesas H8S Series Hardware Manual

Section 18 LPC Interface (LPC)

Table 18.13 HIRQ Setting and Clearing Conditions

Host Interrupt Setting Condition
HIRQ1 Internal CPU writes to ODR1, then reads 0
(independent from bit IRQ1E1 and writes 1
from IEDIR)
HIRQ12 Internal CPU writes to ODR1, then reads 0
(independent from bit IRQ12E1 and writes 1
from IEDIR)
SMI Internal CPU
(IEDIR2 = 1,
•
IEDIR3 = 1, or
IEDIR4 = 1)
•
•
•
SMI Internal CPU
(IEDIR2 = 1,
•
IEDIR3 = 1, or
•
IEDIR4 = 1)
•
•
HIRQi Internal CPU
(i = 6, 9, 10, 11)
•
(IEDIR2 = 1,
IEDIR3 = 1, or
•
IEDIR4 = 1)
•
HIRQi Internal CPU
(i = 6, 9, 10, 11)
•
(IEDIR2 = 1,
•
IEDIR3 = 1, or
•
IEDIR4 = 1)
Rev. 3.00 Jul. 14, 2005 Page 712 of 986
REJ09B0098-0300
writes to ODR2, then reads 0 from bit
SMIE2 and writes 1
writes to ODR3, then reads 0 from bit
SMIE3A and writes 1
writes to TWR15, then reads 0 from bit
SMIE3B and writes 1
writes to ODR4, then reads 0 from bit
SMIE4 and writes 1
reads 0 from bit SMIE2, then writes 1
reads 0 from bit SMIE3A, then writes 1
reads 0 from bit SMIE3B, then writes 1
reads 0 from bit SMIE4, then writes 1
writes to ODR2, then reads 0 from bit
IRQiE2 and writes 1
writes to ODR3, then reads 0 from bit
IRQiE3 and writes 1
writes to ODR4, then reads 0 from bit
IRQiE4 and writes 1
reads 0 from bit IRQiE2, then writes 1
reads 0 from bit IRQiE3, then writes 1
reads 0 from bit IRQiE4, then writes 1
Clearing Condition
Internal CPU writes 0 to bit IRQ1E1,
or host reads ODR1
Internal CPU writes 0 to bit
IRQ12E1, or host reads ODR1
Internal CPU
•
writes 0 to bit SMIE2, or host
reads ODR2
•
writes 0 to bit SMIE3A, or host
reads ODR3
•
writes 0 to bit SMIE3B, or host
reads TWR15
•
writes 0 to bit SMIE4, or host
reads ODR4
Internal CPU
•
writes 0 to bit SMIE2
•
writes 0 to bit SMIE3A
•
writes 0 to bit SMIE3B
•
writes 0 to bit SMIE4
Internal CPU
•
writes 0 to bit IRQiE2, or host
reads ODR2
•
CPU writes 0 to bit IRQiE3, or
host reads ODR3
•
CPU writes 0 to bit IRQiE4, or
host reads ODR4
Internal CPU
•
writes 0 to bit IRQiE2
•
writes 0 to bit IRQiE3
•
writes 0 to bit IRQiE4