Port B Output Data Register (Pbodr); Port B Input Data Register (Pbpin) - Renesas H8S Series Hardware Manual

8.11.2

Port B Output Data Register (PBODR)

PBODR stores output data for the port B pins.
Bit Bit Name
7 PB7ODR
6 PB6ODR
5 PB5ODR
4 PB4ODR
3 PB3ODR
2 PB2ODR
1 PB1ODR
0 PB0ODR
8.11.3

Port B Input Data Register (PBPIN)

PBPIN indicates the pin states.
Bit Bit Name
7 PB7PIN
6 PB6PIN
5 PB5PIN
4 PB4PIN
3 PB3PIN
2 PB2PIN
1 PB1PIN
0 PB0PIN
Note: The initial value of these pins is determined in accordance with the state of pins PB7 to
*
PB0.
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Initial Value R/W
Undefined* R
Undefined* R
Undefined* R
Undefined* R
Undefined* R
Undefined* R
Undefined* R
Undefined* R
Description
The PBODR register stores the output data for the
pins that are used as the general output port.
Description
When a PBPIN read is performed, the pin states
are read.
This register is assigned to the same address as
that of PBDDR. When this register is written to,
data is written to PBDDR and the port B setting is
then changed.
Rev. 3.00 Jul. 14, 2005 Page 205 of 986
Section 8 I/O Ports
REJ09B0098-0300