Section 21 Flash Memory (0.18-µm F-ZTAT Version)
21.3.1
Programming/Erasing Interface Registers
The programming/erasing interface registers are all 8-bit registers that can be accessed in bytes.
These registers are initialized at a reset or in hardware standby mode.
• Flash Code Control Status Register (FCCS)
FCCS is configured by bits which request monitoring of the FWE pin state and error
occurrence during programming or erasing flash memory, and the download of an on-chip
program.
Initial
Bit
Bit Name
Value
7
FWE
1/0
6, 5
All 0
Rev. 3.00 Jul. 14, 2005 Page 746 of 986
REJ09B0098-0300
R/W
Description
R
Flash Program Enable
Monitors the signal level input to the FWE pin.
0: A low level signal is input to the FWE pin.
(Hardware protection state)
1: A high level signal is input to the FWE pin.
R/W
Reserved
The initial value should not be changed.