Changing Values Of Cks2 To Cks0 Bits; Changing Value Of Pss Bit; Switching Between Watchdog Timer Mode And Interval Timer Mode; System Reset By Reso Signal - Renesas H8S Series Hardware Manual

Section 14 Watchdog Timer (WDT)
14.6.3

Changing Values of CKS2 to CKS0 Bits

If CKS2 to CKS0 bits in TCSR are written to while the WDT is operating, errors could occur in
the incrementation. Software must stop the watchdog timer (by clearing the TME bit to 0) before
changing the values of CKS2 to CKS0 bits.
14.6.4

Changing Value of PSS Bit

If the PSS bit in TCSR_1 is written to while the WDT is operating, errors could occur in the
operation. Stop the watchdog timer (by clearing the TME bit to 0) before changing the values of
PSS bit.
14.6.5

Switching between Watchdog Timer Mode and Interval Timer Mode

If the mode is switched from/to watchdog timer to/from interval timer, while the WDT is
operating, errors could occur in the operation. Software must stop the watchdog timer (by clearing
the TME bit to 0) before switching the mode.

System Reset by RESO Signal

14.6.6
Inputting the RESO output signal to the RES pin of this LSI prevents the LSI from being
initialized correctly; the RESO signal must not be logically connected to the RES pin of the LSI.
To reset the entire system by the RESO signal, use the circuit as shown in figure 14.8.
Reset signal for entire system

Figure 14.8 Sample Circuit for Resetting the System by the RESO Signal

Rev. 3.00 Jul. 14, 2005 Page 426 of 986
REJ09B0098-0300
Reset input
This LSI
RES
RESO