Renesas H8S Series Hardware Manual page 489

Bit Bit Name
1 MPB
0 MPBT
Note: * Only 0 can be written to clear the flag.
• Bit Functions in Smart Card Interface Mode (when SMIF in SCMR = 1)
Bit Bit Name
7 TDRE
Initial Value R/W
0 R
0 R/W
Initial Value R/W
1 R/(W)*
Section 15 Serial Communication Interface (SCI, IrDA)
Description
Multiprocessor Bit
MPB stores the multiprocessor bit in the receive
frame. When the RE bit in SCR is cleared to 0 its
previous state is retained.
Multiprocessor Bit Transfer
MPBT stores the multiprocessor bit to be added to
the transmit frame.
Description
Transmit Data Register Empty
Indicates whether TDR contains transmit data.
[Setting conditions]
•
When the TE bit in SCR is 0
•
When data is transferred from TDR to TSR,
and TDR can be written to.
[Clearing conditions]
•
When 0 is written to TDRE after reading TDRE
= 1
•
When a TXI interrupt request is issued
allowing DTC to write data to TDR
Rev. 3.00 Jul. 14, 2005 Page 441 of 986
REJ09B0098-0300