Software Protection; Error Protection; Table 21.10 Software Protection - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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21.5.2

Software Protection

Software protection is set up by disabling download of on-chip programming/erasing programs or
by means of a key code.

Table 21.10 Software Protection

Item
Description
Protection by
SCO bit
Protection by
FKEY
21.5.3

Error Protection

Error protection is a mechanism for aborting programming or erasure when an error occurs, in the
form of the microcomputer entering runaway during programming/erasing of the flash memory or
operations that are not following the stipulated procedures for programming/erasing. Aborting
programming or erasure in such cases prevents damage to the flash memory due to excessive
programming or erasing.
If the microcomputer malfunctions during programming/erasing of the flash memory, the FLER
bit in FCCS is set to 1 and the error-protection state is entered, and this aborts the programming or
erasure.
The FLER bit is set to 1 in the following conditions:
• When an interrupt such as NMI occurs during programming/erasing.
• When the flash memory is read during programming/erasing (including a vector read or an
instruction fetch).
• When a SLEEP instruction (including software-standby mode) is executed during
programming/erasing.
The programming/erasing protection state
is entered by clearing the SCO bit in FCCS
to 0 to disable downloading of the
programming/erasing programs.
Downloading and programming/erasing are
disabled unless the required key code is
written in FKEY. Different key codes are
used for downloading and
programming/erasing.
Section 21 Flash Memory (0.18-µm F-ZTAT Version)
Function to be Protected
Download
Ο
Ο
Rev. 3.00 Jul. 14, 2005 Page 793 of 986
Programming/
Erasure
Ο
Ο
REJ09B0098-0300

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