Renesas H8S Series Hardware Manual page 712

Section 18 LPC Interface (LPC)
Bit Bit Name Initial Value Slave Host Description
5 BUFINIIE 0
4 USERIE 0
3 WAITSEL 0
2 to 0 
All 0
Note: The FLPIE and FLEIE bits are valid when the FLASHE bit is set to 1.
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Rev. 3.00 Jul. 14, 2005 Page 664 of 986
REJ09B0098-0300
R/W

R/W RAM Buffer Initialization Interrupt Enable (LMCI)
0: Disables the RAM buffer initialization command
receive complete interrupt
1: Enables the RAM buffer initialization command
receive complete interrupt

R/W User Command Interrupt Enable (LMCUI)
0: Disables the user command receive complete
interrupt
1: Enables the user command receive complete
interrupt

R/W Wait Select Bit
Selects the wait-state type in an LPC/FW memory
cycle.
0: Short wait (4b'0101)
1: Long wait (4b'0110)

R/W Reserved
These bits are read as 0 and cannot be modified.