Operation; Receive Operation - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

Hide thumbs Also See for H8S Series:

Table of Contents

Operation

In a receive operation, both KCLK (clock) and KD (data) are outputs on the keyboard side and

inputs on this LSI chip (system) side. KD receives a start bit, 8 data bits (LSB-first), an odd parity

bit, and a stop bit, in that order. The KD value is valid when KCLK is low. Value of KD is valid

when the KCLK is low. A sample receive processing flowchart is shown in figure 17.3, and the

receive timing in figure 17.4.

Section 17 Keyboard Buffer Control Unit (KBU)

Rev. 3.00 Jul. 14, 2005 Page 593 of 986

REJ09B0098-0300

H8s/2100 series H8s/2114r R4f2114r