Kd Output By Kdo Bit (Kbcrl) And By Automatic Transmission; Module Stop Mode Setting; Medium Speed Mode; Transmit Completion Flag (Kbte) - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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Section 17 Keyboard Buffer Control Unit (KBU)
17.5.2

KD Output by KDO bit (KBCRL) and by Automatic Transmission

Figure 17.20 shows the relationship between the KD output by the KDO bit (KBCRL) and by the
automatic transmission. Switch to the KD output by the automatic transmission is performed when
KBTS is set to 1 and TXCR is not cleared to 0. In this case, the KD output by the KDO bit
(KBCRL) is masked.
KBTS • (TXCR0 + TXCR1 + TXCR2 + TXCR3)
Output by KDO bit (KBCRL)
Output by automatic transmission
17.5.3

Module Stop Mode Setting

Keyboard buffer control unit operation can be enabled or disabled using the module stop control
register. The initial setting is for keyboard buffer control unit operation to be halted. Register
access is enabled by canceling module stop mode. For details, see section 24, Power-Down
Modes.
17.5.4

Medium Speed Mode

The KBU operates with a medium speed clock in medium speed mode. To operate the KBU
normally, use at least 300-kHz medium speed clock.
17.5.5

Transmit Completion Flag (KBTE)

When TXCR3 to TXCR0 are 1011 (transmit completion notification) and then the TXCR3 to
TXCR0 are initialized by clearing KBIOE or KBTS to 0, the transmit completion flag (KBTE) is
set. In this case, KTER is invalid.
Rev. 3.00 Jul. 14, 2005 Page 612 of 986
REJ09B0098-0300
Output switch signal

Figure 17.20 KDO Output

KD output

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