Timer Counter (Tcnt); Time Constant Register A (Tcora) - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

Hide thumbs Also See for H8S Series:

Table of Contents

• Input capture register F (TICRF)

• Timer connection register I (TCONRI)

For both TMR_Y and TMR_X

• Timer XY control register (TCRXY)

Note: Some of the registers of TMR_X and TMR_Y use the same address. The registers can be

switched by the TMRX/Y bit in TCONRS.

TCNT_Y, TCORA_Y, TCORB_Y, and TCR_Y can be accessed when the RELOCATE

bit in SYSCR3 and the KINWUE bit in SYSCR are cleared to 0 and the TMRX/Y bit in

TCONRS is set to 1, or when the RELOCATE bit in SYSCR3 is set to 1. TCNT_X,

TCORA_X, TCORB_X, and TCR_X can be accessed when the RELOCATE bit in

SYSCR3, the KINWUE bit in SYSCR, and the TMRX/Y bit in TCONRS are cleared to 0,

or when the RELOCATE bit in SYSCR3 is set to 1.

Timer Counter (TCNT)

Each TCNT is an 8-bit readable/writable up-counter. TCNT_0 and TCNT_1 (or TCNT_X and

TCNT_Y) comprise a single 16-bit register, so they can be accessed together by word access. The

clock source is selected by the CKS2 to CKS0 bits in TCR. TCNT can be cleared by an external

reset input signal, compare-match A signal or compare-match B signal. The method of clearing

can be selected by the CCLR1 and CCLR0 bits in TCR. When TCNT overflows (changes from

H'FF to H'00), the OVF bit in TCSR is set to 1. TCNT is initialized to H'00.

TCORA is an 8-bit readable/writable register. TCORA_0 and TCORA_1 (or TCORA_X and

TCORA_Y) comprise a single 16-bit register, so they can be accessed together by word access.

TCORA is continually compared with the value in TCNT. When a match is detected, the

corresponding compare-match flag A (CMFA) in TCSR is set to 1. Note however that comparison

is disabled during the T

freely controlled by these compare-match A signals and the settings of output select bits OS1 and

OS0 in TCSR. TCORA is initialized to H'FF.

state of a TCORA write cycle. The timer output from the TMO pin can be

Section 13 8-Bit Timer (TMR)

Rev. 3.00 Jul. 14, 2005 Page 383 of 986

REJ09B0098-0300

H8s/2100 series H8s/2114r R4f2114r