Bypass Register (Sdbpr); Boundary Scan Register (Sdbsr); Table 22.3 Correspondence Between Pins And Boundary Scan Register - Renesas H8S Series Hardware Manual

Section 22 Boundary Scan (JTAG)
22.3.2

Bypass Register (SDBPR)

SDBPR is a 1-bit shift register. In BYPASS, CLAMP, or HIGHZ mode, SDBPR is connected
between the ETDI and ETDO pins.
22.3.3

Boundary Scan Register (SDBSR)

SDBSR is a shift register provided on the PAD for controlling the I/O terminals of this LSI.
Using EXTEST mode or SAMPLE/PRELOAD mode, a boundary scan test conforming to the
IEEE1149.1 standard can be performed.
Table 22.3 shows the relationship between the terminals of this LSI and the boundary scan
register.

Table 22.3 Correspondence between Pins and Boundary Scan Register

Pin No. Pin Name
2 P43
3 P44
4 P45
5 P46
6 P47
9 MD1
10 MD0
Rev. 3.00 Jul. 14, 2005 Page 832 of 986
REJ09B0098-0300
Input/Output
from ETDI
Input
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Output
Input
Enable
Output
Input
Enable
Output
Input
Enable
Output
Input
Enable
Output
Input
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Input
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Bit No.
333
332
331
330
329
328
327
326
325
324
323
322
321
320
319
318
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317
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