Renesas H8S Series Hardware Manual page 476

16-bit single-chip microcomputer
Hide thumbs Also See for H8S Series:
Table of Contents

Advertisement

Section 15 Serial Communication Interface (SCI, IrDA)
Asynchronous Mode:
• Data length: 7 or 8 bits
• Stop bit length: 1 or 2 bits
• Parity: Even, odd, or none
• Receive error detection: Parity, overrun, and framing errors
• Break detection: Break can be detected by reading the RxD pin level directly in case of a
framing error
• Multiprocessor communication capability
Clocked Synchronous Mode:
• Data length: 8 bits
• Receive error detection: Overrun errors
Smart Card Interface:
• An error signal can be automatically transmitted on detection of a parity error during reception.
• Data can be automatically re-transmitted on detection of an error signal during transmission.
• Both direct convention and inverse convention are supported.
Figure 15.1 shows a block diagram of SCI.
Rev. 3.00 Jul. 14, 2005 Page 428 of 986
REJ09B0098-0300

Advertisement

Table of Contents
loading

This manual is also suitable for:

H8s/2100 seriesH8s/2114rR4f2114r

Table of Contents