Kclko And Kdo Write Timing; Figure 17.10 Kclko And Kdo Write Timing - Renesas H8S Series Hardware Manual

17.4.5

KCLKO and KDO Write Timing

Figure 17.10 shows the KLCKO and KDO write timing and the KCLK and KD pin states.
φ*
Internal write
signal
KCLKO, KDO
(register)
KCLK, KD
(pin state)
The φ clock shown here is scaled by 1/N in medium-speed mode.
Note:*
T1 T2

Figure 17.10 KCLKO and KDO Write Timing

Section 17 Keyboard Buffer Control Unit (KBU)
Rev. 3.00 Jul. 14, 2005 Page 601 of 986
REJ09B0098-0300