Figure 21.12 Erasing Procedure - Renesas H8S Series Hardware Manual

Section 21 Flash Memory (0.18-µm F-ZTAT Version)
(3) Erasing Procedure in User Program Mode
The procedures for download, initialization, and erasing are shown in figure 21.12.
Start erasing procedure
program
Select on-chip program
to be downloaded and
specify download
destination by FTDAR
Set FKEY to H'A5
Set SCO to 1 and
execute download
Clear FKEY to 0
DPFR = 0?
Yes
Set the FPEFEQ
parameter
Initialization
JSR FTDAR setting + 32
FPFR = 0 ?
Yes
1
The procedure program must be executed in an area other than the user MAT to be erased.
Especially the part where the SCO bit in FCCS is set to 1 for downloading must be executed in the
on-chip RAM.
The area that can be executed in the steps of the user procedure program (on-chip RAM and user
MAT) is shown in section 21.4.4, Storable Areas for Procedure Program and Program Data.
For the downloaded on-chip program area, see the RAM map for programming/erasing in figure
21.10.
Rev. 3.00 Jul. 14, 2005 Page 776 of 986
REJ09B0098-0300
(a)
No
Download error processing
No
Initialization error processing

Figure 21.12 Erasing Procedure

1
Disable interrupts and
bus master operation
other than CPU
Set FKEY to H'5A
Set the FEBS parameter
Erasing
JSR FTDAR setting + 16
FPFR = 0?
Yes
Erasing error processing
No Required block
erasing is
completed?
Yes
Clear FKEY to 0
End erasing
procedure program
(b)
(c)
(d)
No
Clear FKEY
(e)
(f)