Renesas H8S Series Hardware Manual page 684

Section 18 LPC Interface (LPC)
Bit Bit Name Initial Value Slave Host Description
1 IBF2 0
0 OBF2 0
Note: * Only 0 can be written to clear the flag.
• STR3 (TWRE = 1 or SELSTR3 = 0)
Bit Bit Name Initial Value Slave
7 IBF3B 0
6 OBF3B 0
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R/W
R R Input Buffer Full
This bit is an internal interrupt source to the slave
(this LSI).
0: [Clearing condition]
When the slave reads IDR2
1: [Setting condition]
When the host writes to IDR2 in I/O write cycle
R/(W)* R Output Buffer Full
0: [Clearing conditions]
•
When the host reads ODR2 in I/O read cycle
•
When the slave writes 0 to the OBF2 bit
1: [Setting condition]
•
When the slave writes to ODR2
R/W
Host Description
R R Bidirectional Data Register Input Buffer Full Flag
This is an internal interrupt source to the slave (this
LSI).
0: [Clearing condition]
When the slave reads TWR15
1: [Setting condition]
When the host writes to TWR15 in I/O write cycle
R/(W)* R Bidirectional Data Register Output Buffer Full Flag
0: [Clearing conditions]
•
When the host reads TWR15 in I/O read cycle
•
When the slave writes 0 to the OBF3B bit
1: [Setting condition]
•
When the slave writes to TWR15