Table 21.9 Hardware Protection - Renesas H8S Series Hardware Manual

Section 21 Flash Memory (0.18-µm F-ZTAT Version)

Table 21.9 Hardware Protection

Item
FWE pin protection •
Reset,
standby protection
Rev. 3.00 Jul. 14, 2005 Page 792 of 986
REJ09B0098-0300
Description
When a low-level signal is input to the
FWE pin, the FWE bit in FCCS is cleared
and the programming/erasing protection
state is entered.
•
The programming/erasing interface
registers are initialized in the reset state
(including a reset by the WDT) and
hardware standby mode, and the
programming/erasing protection state is
entered.
•
The reset state will not be entered by a
reset using the RES pin unless the RES
pin is held low until oscillation has
stabilized after the power is supplied. In
the case of a reset during operation, hold
the RES pin low for the RES pulse width
that is specified by the AC
characteristics. If a reset is input during
programming or erasure, values in the
flash memory are not guaranteed. In this
case, execute erasure and then execute
programming again.
Function to be Protected
Programming/
Download Erasure
 Ο
Ο Ο