Operation In Asynchronous Mode; Data Transfer Format; Figure 15.2 Data Format In Asynchronous Communication (Example With 8-Bit Data, Parity, Two Stop Bits) - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Operation in Asynchronous Mode

Figure 15.2 shows the general format for asynchronous serial communication. One frame consists

of a start bit (low level), followed by transmit/receive data, a parity bit, and finally stop bits (high

level). In asynchronous serial communication, the transmission line is usually held in the mark

state (high level). The SCI monitors the transmission line, and when it goes to the space state (low

level), recognizes a start bit and starts serial communication. Inside the SCI, the transmitter and

receiver are independent units, enabling full-duplex communication. Both the transmitter and the

receiver also have a double-buffered structure, so that data can be read or written during

transmission or reception, enabling continuous data transfer and reception.

Figure 15.2 Data Format in Asynchronous Communication

Table 15.10 shows the data transfer formats that can be used in asynchronous mode. Any of 12

transfer formats can be selected according to the SMR setting. For details on the multiprocessor

bit, see section 15.5, Multiprocessor Communication Function.

Transmit/receive data

One unit of transfer data (character or frame)

(Example with 8-Bit Data, Parity, Two Stop Bits)

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 3.00 Jul. 14, 2005 Page 455 of 986

(mark state)

REJ09B0098-0300

H8s/2100 series H8s/2114r R4f2114r