Usage Notes; Kbioe Setting And Kclk Falling Edge Detection; Figure 17.19 Kbioe Setting And Kclk Falling Edge Detection Timing - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Usage Notes

When KBIOE is 0, the internal KCLK and internal KD settings are fixed at 1. Therefore, if the

KCLK pin is low when the KBIOE bit is set to 1, the edge detection circuit operates and the

KCLK falling edge is detected.

If the KBFSEL bit and KBE bit are both 0 at this time, the KBF bit is set. Figure 17.19 shows the

timing of KBIOE setting and KCLK falling edge detection.

Internal KCLK

Falling edge

Section 17 Keyboard Buffer Control Unit (KBU)

Rev. 3.00 Jul. 14, 2005 Page 611 of 986

REJ09B0098-0300

H8s/2100 series H8s/2114r R4f2114r