Renesas H8S Series Hardware Manual page 911

Initial
Bit Bit Name Value
6 LSON 0
5 NESEL 0
4 EXCLE 0
3 to 0 
All 0
R/W Description
R/W Low-Speed On Flag
Specifies the operating mode to be entered after executing the
SLEEP instruction. This bit also controls whether to shift to
high-speed mode or subactive mode when watch mode is
cancelled.
When the SLEEP instruction is executed in high-speed mode or
medium-speed mode:
0: Shifts to sleep mode, software standby mode, or watch
mode
1: Shifts to watch mode or subactive mode
When the SLEEP instruction is executed in subactive mode:
0: Shifts directly to watch mode or high-speed mode
1: Shifts to subsleep mode or watch mode
When watch mode is cancelled:
0: Shifts to high-speed mode
1: Shifts to subactive mode
R/W Noise Elimination Sampling Frequency Select
Selects the frequency by which the subclock (φSUB) input from
the EXCL or ExEXCL pin is sampled using the clock (φ)
generated by the system clock pulse generator. Clear this bit to
0 when φ is 5 MHz or more.
0: Sampling using φ/32 clock
1: Sampling using φ/4 clock
R/W Subclock Input Enable
Enables or disables subclock input from the EXCL or ExEXCL
pin.
0: Disables subclock input from the EXCL or ExEXCL pin
1: Enables subclock input from the EXCL or ExEXCL pin
R/W Reserved
The initial value should not be changed.
Section 24 Power-Down Modes
Rev. 3.00 Jul. 14, 2005 Page 863 of 986
REJ09B0098-0300