Renesas H8S Series Hardware Manual page 800

Section 21 Flash Memory (0.18-µm F-ZTAT Version)
• Flash Transfer Destination Address Register (FTDAR)
FTDAR specifies the on-chip RAM address where an on-chip program is downloaded. This
register must be specified before setting the SCO bit in FCCS to 1.
Initial
Bit Bit Name Value
7 TDER 0
6 TDA6 0
5 TDA5 0
4 TDA4 0
3 TDA3 0
2 TDA2 0
1 TDA1 0
0 TDA0 0
Rev. 3.00 Jul. 14, 2005 Page 752 of 986
REJ09B0098-0300
R/W Description
R/W Transfer Destination Address Setting Error
This bit is set to 1 when the address specified by bits
TDA6 to TDA0, which is the start address where an on-
chip program is downloaded, is over the range. Whether
or not the address specified by bits TDA6 to TDA0 is
within the range of H'00 to H'03 is determined when an
on-chip program is downloaded by setting the SCO bit in
FCCS to 1. Make sure that this bit is cleared to 0 and the
value specified by bits TDA6 to TDA0 is within the range
of H'00 to H'03 before setting the SCO bit to 1.
0: The value specified by bits TDA6 to TDA0 is within
the range.
1: The value specified by bits TDA6 to TDA0 is over the
range (H'04 to H'7F) and download is stopped.
R/W Transfer Destination Address
R/W Specifies the start address where an on-chip program is
downloaded. A value of H'00 can be specified as the
R/W
download start address in the on-chip RAM.
R/W
H'00: H'FFD080 is specified as the download start
R/W
address.
R/W
H'01: H'FFD880 is specified as the download start
address.
R/W
H'02: H'FFE080 is specified as the download start
address.
H'03 to H'7F: Setting prohibited. Specifying this value
sets the TDER bit to 1 during downloading
and stops the download.