On-Chip Ram Address Space Set Register (Ramassr) - Renesas H8S Series Hardware Manual

18.3.24 On-Chip RAM Address Space Set Register (RAMASSR)

RAMASSR selects the on-chip RAM address space to be used by the host and slave. The bits 7 to
5 do not affect operations. The contents of this register must not be changed in LPC/FW memory
cycles (while LMCE is set to 1).
Initial
Bit Bit Name Value

7 0

6 0

5 0
4 RAMAS4 0
3 RAMAS3 0
2 RAMAS2 0
1 RAMAS1 0
0 RAMAS0 0
R/W
Slave Host Description

R/W On-Chip RAM Address Space Selection

R/W Select the on-chip RAM address space to be used by the
host.

R/W
RAM RAM RAM RAM RAM

R/W
AS4

R/W
0

R/W
0

R/W
0

R/W
0
0
1
RAM address space = 256 bytes × RAMAS
AS3 AS2 AS1 AS0
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
:
1 1 1 1
Rev. 3.00 Jul. 14, 2005 Page 669 of 986
Section 18 LPC Interface (LPC)
: Setting prohibited
: 256 bytes
: 512 bytes
: 768 bytes
: 1 kbyte
: 8 kbytes − 256 bytes
REJ09B0098-0300