Renesas H8S Series Hardware Manual page 268

Section 8 I/O Ports
• PD5/TIOCB1/TCLKC
The pin function is switched as shown below according to the combination of the TPU
channel 1 setting, TPSC2 to TPSC0 bits in TCR_0 and TCR_2 of TPU, and the PD5DDR.
TPU Channel 1
Setting
PD5DDR
Pin Function
Notes: 1. This pin functions as TCLKC input when TPSC2 to TPSC0 in TCR_0 or TCR_2 are set
to 110 or when channel 2 is set to phase counting mode.
2. This pin functions as TIOCB1 input when TPU channel 1 timer operating mode is set to
normal operation or phase counting mode and IOB3 to IOB0 in TIOR_1 are set to 10xx.
• PD4/TIOCA1
The pin function is switched as shown below according to the combination of the TPU
channel 1 setting and the PD4DDR.
TPU Channel 1
Setting
PD4DDR
Pin Function
Note: * This pin functions as TIOC
normal operation or phase counting mode and IOA3 to IOA0 in TIOR_2 are set to 10xx.
Rev. 3.00 Jul. 14, 2005 Page 220 of 986
REJ09B0098-0300
Input or Initial Value
0
PD5 input pin
TIOCB1 input pin*
Input or Initial Value
0
PD4 input pin
TIOCA1 input pin*
input when TPU channel 1 timer operating mode is set to
A1
1
PD5 output pin
2
1
TCLKC input pin*
1
PD4 output pin
Output

TIOCB1 output pin
Output

TIOCA1 output pin