Port G; Port G Data Direction Register - Renesas H8S Series Hardware Manual

8.16

Port G

Port G is an 8-bit I/O port. Port G pins also function as the interrupt input pins, and TMR_0,
TMR_1, TMR_X, TMR_Y input pins and IIC_0, and IIC_1 input/output pins. The output format
for port G is NMOS push-pull output.
Port G has the following registers. PGDDR and PGPIN have the same address.
• Port G data direction register (PGDDR)
• Port G output data register (PGODR)
• Port G input data register (PGPIN)
• Port G Nch-OD control register (PGNOCR)
• Noise canceller enable register (PGNCE)
• Noise canceller decision control register (PGNCMC)
• Noise cancel cycle setting register (PGNCCS)
8.16.1 Port G Data Direction Register (PGDDR)
The individual bits of PGDDR specify input or output for the pins of port G.
Bit Bit Name
7 PG7DDR
6 PG6DDR
5 PG5DDR
4 PG4DDR
3 PG3DDR
2 PG2DDR
1 PG1DDR
0 PG0DDR
Initial Value R/W
0 W
0 W
0 W
0 W
0 W
0 W
0 W
0 W
Description
The corresponding port G pins are output ports
when the PGDDR bits are set to 1, and input ports
when cleared to 0.
Rev. 3.00 Jul. 14, 2005 Page 233 of 986
Section 8 I/O Ports
REJ09B0098-0300