Figure 18.2 Typical Lframe Timing; Figure 18.3 Abort Mechanism - Renesas H8S Series Hardware Manual

LCLK
LFRAME
LAD3 to
LAD0
Number of clocks
LCLK
LFRAME
LAD3 to LAD0
Start ADDR
Cycle type,
direction,
and size
1 1

Figure 18.2 Typical LFRAME Timing

Start ADDR
Cycle type,
direction,
and size

Figure 18.3 Abort Mechanism

TAR Sync
4 2 1
TAR Sync
Slave must stop driving
Too many Syncs
cause timeout
Rev. 3.00 Jul. 14, 2005 Page 679 of 986
Section 18 LPC Interface (LPC)
Data TAR Start
2 2 1
Master will
drive high
REJ09B0098-0300