Figure 17.7 (1) Sample Receive Abort Processing Flowchart - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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Section 17 Keyboard Buffer Control Unit (KBU)
Start
Receive state
Read KBCRL
KBF = 0?
Read KBCRH
RXCR3 to RXCR0 ≥
B'1001?
Disable receive abort
requests

Figure 17.7 (1) Sample Receive Abort Processing Flowchart

Rev. 3.00 Jul. 14, 2005 Page 598 of 986
REJ09B0098-0300
No
Yes
No
Yes
[3]
(receive abort request)
command transmission
(disable KBBR reception
and clear receive counter)
Clear I/O inhibit
To transmit operation
[1] Read KBCRL, and if KBF = 1,
[2] Read KBCRH, and if the value of
[3] If the value of bits RXCR3 to
[1]
Processing 1
[2]
KCLKO = 0
Retransmit
No
(data)?
Yes
KBE = 0
Set start bit
(KDO = 0)
(KCLKO = 1)
Transmit data
perform processing 1.
bits RXCR3 to RXCR0 is less than
B'1001, write 0 in KCLKO to abort
reception.
RXCR0 is B'1001 or greater, wait
until stop bit reception is
completed, then perform receive
data processing, and proceed to
the next operation.
If the value of bits RXCR3 to
RXCR0 is B'1001 or greater, the
parity bit is being received. With
the PS2 interface, a receive abort
request following parity bit
reception is disabled. Wait until
stop bit reception is completed,
perform receive data processing
and clear the KBF flag, then
proceed to the next operation.
KBE = 0
(disable KBBR reception
and clear receive counter)
KBE = 1
(enable KB operation)
Clear I/O inhibit
(KCLKO = 1)
To receive operation

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